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9i-90SA DAC/headphone Amp/Pre Amp
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9i-90SA DAC/headphone Amp/Pre Amp

. 9i-90SA "Lark" DAC/headphone amplifier/preamplifier is the first product of Cen.grand to enter the headphone market. This low-priced product, priced at RMB3080, carries high-level audio technology and numerous functions. It has won a lot of praise since it came into the market.
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Product description

    The 9i-90sa "Lark" DAC/Headphone Amplifier/Preamplifier is a good performance hifi product. Suitable for the HiFi user group of headphones.

       

     Its basic structure is WM8805 + dual AK4495SEQ, and the output circuit is made by discrete devices. The USB part adopts XMOS second generation XU208 + CPLD, and the spdif input interface has coaxial, optical fiber, BNC, AES. Supports 24bit/192KHz PCM input. USB supports DSD128 and PCM384.

 

     The headphone amplifier is a fully balanced structure with 6.35 unbalanced and 4-core XLR balanced output interfaces. There are four modes: standard, balanced, virtual ground, and parallel. The four modes offer a wider range of options, and the 9i-90SA is capable of both high-impedance and low-impedance headphones.

 

     The 9i-90SA can also be used as a preamplifier with infrared remote control.

 

     USB uses XMOS's latest XU208 solution, which is the second generation XMOS solution that supports DSD128/PCM384. In order to improve performance, the CPLD module is specially designed for digital and clock processing. The specific features are as follows:

 

     1、 USB AUDIO uses XMOS's second-generation XU208, and the kernel version is XCORE-200. The XU208's memory is doubled compared to the previous generation's U8, with an operating speed of 1000 MIPS, which is twice as high as the U8's 500 MIPS.

 

     2、A low-jitter clock system is built using a low-jitter CPLD; the CPLD is fully responsible for local audio clock management.

 

     3、 XMOS and CPLD work perfectly together. The XMOS high-speed processor is only responsible for data processing, and the digital audio part is handled by the CPLD.

 

     4、CPLD uses advanced source synchronization technology and de-jitter shaping technology, which can perform secondary shaping of the XMOS output waveform, which can further eliminate the additive jitter caused by XMOS pins.

 

 

 

             

 

                              Performance parameter

 

       Maximum audio support specifications: Spdif input ----- PCM192

                                                                       USB input ----- DSD128 PCM384

      Dynamic range: 115dB

      Signal to noise ratio: 115dB (A weighting)

       Frequency response: ±0.4 dB (20-20KHz A weighting)

      THD+N : -107dB (fs=96KHz /1KHz A weighting)

      Pre-level gain: 4db (volume is 0db)

      Output power: 125mW(600欧)   189mW(300欧)  (失真0.1%) 

      Dimensions : 280mm * 100mm * 310mm(WHD)

      Power supply : AC 220V-230V 50-60HZ (Fuse specification: 6.3A)

      Net Weight : 5.6kg

      Total Weight : 6.6kg

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